The invention in general relates to the addressing of elements of a computer memory. For executing a so-called user program, a computer is controlled by user addresses. These addresses are provided by the application program for controlling a memory access specified therein. Such an address specifies a data item, for example, as a given element of a given data file. Addresses of this kind are logic addresses in a sense that they do not relate to the physical organization of the memory. An address of this kind thus comprises a string of bits of successive significance levels, the meaning of the successive bits not being different from each other on the basis of electrical, mechanical or other organizational properties of the memory. Furthermore, the operation of the computer is controlled by one or more instructions. These instructions may have a bit-length which equals a multiple of the standard data word length for which the computer has been designed. The length of the instruction may in some cases also be equal to the word length. A computer which is of relevance for the present invention is the Philips minicomputer P856 M from the P800 series. In this respect, reference is had to the "P800 M Interface and Installation Manual", issued by Philips Data Systems B. V., Apeldoorn, the Netherlands, April 1976, publication number 5122 991 26942. The set of instructions for this computer has been described in the corresponding book "P852 M, Programmers Guide 1 & 2, Vol. 2, Instruction Set, basic/disk operating System", Philips Electrologica MMG-OEM, September 1974, Apeldoorn, the Netherlands, publication number 5122 991 11711.
The word length in said computers amounts to sixteen bits, while usually so-called double length instructions (32 bits) are used. Part of an instruction can be used for addressing a given index register from a set of index registers. The loading of these registers is realized via the normal data channels, for example, the internal data bus of the computer. Therefore, the length of the index registers usually has corresponded to the length of a computer word (i.e. sixteen bits in the example). The content of an index register can directly contain a physical or logic address. In a latter case, said logic address is translated into a physical address by means of a segment or page table. On the other hand, the content of the register may be combined with a predetermined part of the instruction in order to form an address. The latter can again be a physical or a logic address.
It has been found that the word length available for forming logic addresses in a computer system of the described kind is too limited. This is because it is usually impossible to directly address an adequate number of data elements. On the other hand, modification to a larger word length is extremely expensive, because all hardware and software must be adapted to the larger word length.